The present invention pertains to digital input buffers for use in write drivers for magnetic transducers.
In the art of magnetic recording, magnetic transducers write binary data on a magnetic medium, such as a moving magnetic tape or disc. The magnetic transducers use inductive coils to generate magnetic fields, which form magnetic patterns on the medium. The generated magnetic fields are polarized according to the direction current conducts, or flows, through the coils. Thus, selectively reversing the current direction makes it possible to form, or write, oppositely polarized magnetic patterns representing the ones and zeros of the binary data.
Reversing the current direction entails use of a write driver. A typical write driver includes a set of forward switches for directing current in a forward direction and a set of reverse switches for directing current in a reverse, or opposite, direction. The forward and reverse switches react to a pair of complementary, or differential, write signals that alternately operate the forward and reverse switches, thereby reversing the current and generating the magnetic fields for writing the binary data.
The write signals that operate the forward and reverse switches typically originate from a controller which interfaces with the write driver. A controller typically provides either a single TTL-compatible signal or a pair of PECL-compatible signals. Standard TTL (transistor-transistor-logic) signals have a logic zero threshold of 0.8V and a logic one threshold of 2.0V, and standard PECL (positive or pseudo emitter-coupled-logic) signals have a logic zero threshold of 3.1 to 3.4V and a logic one threshold of 4 to 4.3V.
To electrically isolate the controller from the write driver and to match the write signals to the switches, the write driver includes either a TTL or a PECL input buffer. The TTL buffer converts the single TTL signal, output by the controller, to the complementary signals for operating the write driver's forward and reverse switches. The PECL buffer simply buffers, or transfers, the controller's PECL signals to the switches.
Because controllers output either TTL-compatible or PECL-compatible signals, manufacturers of write drivers typically offer two distinct lines, or styles, of write drivers: one with a TTL buffer and the other with a PECL buffer. To fabricate the two lines of write drivers manufacturers commonly form write drivers with all the elements for a PECL and a TTL input buffer. Then, during the final steps of fabrication, a TTL or PECL metal option (metallic connecting layer) is applied to connect the elements of either the TTL or the PECL input buffer.
Applying the separate metal options, however, increases manufacturing complexity and reduces the scale economies of producing mass quantities of integrated write drivers. Thus, there is a need for a single input buffer circuit that accepts both TTL and PECL inputs. Such a buffer would not only reduce the cost of manufacturing integrated write driver circuits, but also offer the design flexibility of a single write driver with two input options.